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Last updated: 2004-01-23
- DRAM-Chip-to-Module-Size-Correlation
- Some Examples
- List of References
1. DRAM-Chip-to-Module-Size-Correlation
Single In-line Memory Modules (SIMM) are available as 30-pin modules with 8Bit data
width (with parity: 9Bit) or 72-pin modules with 32Bit data width (with parity: 36Bit). The data capacity of a module
is given in MegaByte (1 MegaByte= 1 MByte= 1 MB) and 1 Byte is eqivalent to a data width from 8 Bit.
Small Outline J-Lead (SOJ)
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Thin Small Outline Package Type II (TSOP Type II)
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Common used packages of the soldered DRAM chips are Thin Small Outline Package Type II (TSOP Type II)
or Small Outline J-Lead (SOJ).
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30-pin modules are available in 256kB,
1MB, 2MB, 4MB, 8MB and 16MB with or without parity and 2, 4 or 8 data chips per module.
Normally the chips are placed one-sided only.
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72-pin modules (also called PS/2) are
available in 1MB, 2MB, 4MB, 8MB, 16MB, 32MB, 64MB and 128MB with or without parity in
both EDO and FPM type and 2, 4, 8 or 16 data chips. The chips are placed one-sided
or on both sides.
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Looking at the number of pins on each individual data chip on the module can give you
an idea of the data capacity of the chips and thus the module. Remember the
Number-of-Pins-to-Data-Capacity-per-Chip-Correlation:
A module with 8 chips in SOJ-package and each 24 pins in 4 sets of 6 pins
(--> 16MBit Chip) has a data capacity from 16MByte because
16MBit x 8 Chips
---------------- = 16MByte
8Bit/Byte
and a module with 4 chips in TSO-package and each
32 pins in 4 sets of 8 pins (--> 64MBit Chip) has a data capacity from 32MByte because
64MBit x 4 Chips
---------------- = 32MByte
8Bit/Byte
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This foto (found
somewhere on the Internet) shows a very rare item: a 30-Pin SIM- Module with a data
capacity from 16 MByte. It is difficult to read the part number (maybe xx16100),
but the memory chips with 24 pins in 4 groups to 6 pins allow the identification. |
The charts below provide information for common Chip-to-Module-Size-Correlation.
The number of pins per chip relates to common TSOP Type II- or SOJ- package with each 4 sets of pins:
30-pin SIMM
Organization |
Data Capacity |
# Pins |
# Chips (# Pins per Data Chip) |
Parity |
256kx8 |
256kByte |
30 |
2 or 8 |
NO |
256kx9 |
256kByte |
30 |
3 or 9 |
YES |
1Mx8 |
1MByte |
30 |
2 (20) or 8 (20) |
NO |
1Mx9 |
1MByte |
30 |
3 or 9 |
YES |
2Mx8 |
2MByte |
30 |
4 (20) |
NO |
2Mx9 |
2MByte |
30 |
6 |
YES |
4Mx8 |
4MByte |
30 |
2 (24) or 8 (20) |
NO |
4Mx9 |
4MByte |
30 |
3 or 9 |
YES |
8Mx8 |
8MByte |
30 |
4 (24) |
NO |
8Mx9 |
8MByte |
30 |
6 |
YES |
16Mx8 |
16MByte |
30 |
8 (24) |
NO |
16Mx9 |
16MByte |
30 |
9 or 12 |
YES |
72-pin SIMM
Organization |
Data Capacity |
# Pins |
# Chips (# Pins per Data Chip) |
Parity |
256Kx32 |
1MByte |
72 |
2 (20) or 8 (20) |
NO |
256Kx36 |
1MByte |
72 |
9 or 12 |
YES |
512kx32 |
2MByte |
72 |
4 (20) or 16 (20) |
NO |
512kx36 |
2MByte |
72 |
6 or 18 or 24 |
YES |
1Mx32 |
4MByte |
72 |
2 (24) or 8 (20) |
NO |
1Mx36 |
4MByte |
72 |
3 or 9 or 12 |
YES |
2Mx32 |
8MByte |
72 |
4 (24) or 16 (20) |
NO |
2Mx36 |
8MByte |
72 |
6 or 18 or 24 |
YES |
4Mx32 |
16MByte |
72 |
2 (32) or 8 (24) |
NO |
4Mx36 |
16MByte |
72 |
9 or 12 |
YES |
8Mx32 |
32MByte |
72 |
4 (32) or 16 (24) |
NO |
8Mx36 |
32MByte |
72 |
6 or 18 or 24 |
YES |
16Mx32 |
64MByte |
72 |
8 (32) |
NO |
16Mx36 |
64MByte |
72 |
9 or 12 |
YES |
32Mx32 |
128MByte |
72 |
16 (32) |
NO |
32Mx36 |
128MByte |
72 |
18 or 24 |
YES |
2. Some Examples
Chip name: HYB514100BJ-60, Number of chips on module: 9, Number of pins: 30
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HYB51 4 1 00 BJ -60
HYB designates a Siemens device,
the 51 designates a 5V device,
the 4 designates a 4MBit chip,
the 1 designates 1 bit data width,
the 00 designates a FPM device and
least the -60 indicates the speed of 60ns.
The chip is thus 4MBit (4Mx1) 60ns FPM. If there are 9 such chips on the 30pin
SIMM module, then it is 4Mx1x9=4Mx9.
This is a 4 MByte 30pin FPM module with parity.
1st Chip name: uPD4217400-60
Number of chips on module: 2 and 2nd Chip name: uPD424100-60, Number of chips on module:
1, Number of Pins: 30
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The uPD denotes it is a NEC device
Data chips: uPD42 17 4 00 -60
The 17 designates a 16 MBit chip with 2k refresh.
The 4 designates 4 bits data width.
The 00 designates a FPM device.
The -60 indicates a speed of 60ns.
The data chip is thus a 16 MBit (4Mx4) FPM 60ns device.
Parity chips: uPD42 4 1 00-60
The 4 designates a 4 MBit chip
The 1 designates 1 bit data width.
The 00 designates a FPM device.
The -60 indicates a speed of 60ns.
The parity chip is thus a 4 MBit (4Mx1) FPM 60ns device.
If there are 2 data chips and 1 parity chips on the module, then we have
4Mx4x2 + 4Mx1x1 = 4Mx8 + 4Mx1 = 4Mx9.
This is a 4 MByte 30pin FPM module with parity.
Chip name: MCM54400-70, Number of chips on module: 8, Number of pins: 72
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MCM5 4 4 00 -70
The MCM designates a Motorola device.
The first 4 designates a 4 MBit chip and
the second 4 designates 4 bits data width.
The 00 designates a fast page device and
least the -70 indicates a speed of 70ns.
The chip is thus 4 MBit (1Mx4) 70ns FPM. If there are 8 such chips on the 72pin
SIMM module, then it is 1Mx4x8=1Mx32.
This is a 4 MByte 72pin FPM module with no parity.
Chip name: MB8118165-70, Number of chips on module: 2, Number of Pins: 72
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MB81 18 16 5-70
The MB designates a Fujitsu device.
The 18 designates a 16 MBit chip with 1k refresh and
the 16 designates 16 bits data width.
The 5 designates an EDO device.
The -70 indicates a speed of 70ns.
The chip is thus 16 MBit (1Mx16) 70ns EDO. If there are 2 such chips on a 72pin simm module,
then it is 1Mx16x2=1Mx32.
This is a 4 MByte 72pin FPM module with no parity.
Chip name: HY514400-60, Number of chips on module: 16, Number of Pins: 72
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Front view |
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Back view |
HY51 4 4 00 -60
The H5M designates a Hyundai device
The first 4 designates a 4 MBit chip.
The second 4 designates 4 bit data width.
The 00 designates a FPM device.
Least the -6 indicates a speed of 60ns.
The chip is thus 4 MBit (1Mx4) 60ns FPM. If there are 16 such chips on a 72pin
SIMM, then it is 2x1Mx4x8=2Mx32.
This is a 8 MByte 72pin FPM module without parity.
3. List of References
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